
Analog Devices Inc. AD9652 16-Bit Analog-to-Digital Converter (ADC)
Analog Devices Inc. AD9652 16-Bit Analog-to-Digital Converter (ADC) is a dual ADC with sampling speeds of up to 310MSPS. It is designed to support demanding, high speed signal processing applications that require exceptional dynamic range over a wide input frequency range (up to 465MHz). Its exceptional low noise floor of −157.6dBFS and large signal spurious-free dynamic range (SFDR) performance (exceeding 85dBFS, typical) allows low level signals to be resolved in the presence of large signals. The dual ADC cores feature a multistage, pipelined architecture with integrated output error correction logic. A high performance on-chip buffer and internal voltage reference simplify the inter-face to external driving circuitry while preserving the exceptional performance of the ADC.Features
- High dynamic range
- SNR = 75.0dBFS at 70MHz (AIN = −1dBFS)
- SFDR = 87dBc at 70MHz (AIN = −1dBFS)
- Noise spectral density (NSD) = −156.7dBFS/Hz input noise at −1dBFS at 70MHz
- NSD = −157.6dBFS/Hz for small signal at −7dBFS at 70MHz
- 90dB channel isolation/crosstalk
- On-chip dithering (improves small signal linearity)
- Excellent IF sampling performance
- SNR = 73.7dBFS at 170MHz (AIN = −1dBFS)
- SFDR = 85dBc at 170MHz (AIN = −1dBFS)
- Full power bandwidth of 465MHz
- On-chip 3.3V buffer
- Programmable input span of 2V p-p to 2.5V p-p (default)
- Differential clock input receiver with 1, 2, 4, and 8 integer inputs (clock divider input accepts up to 1.24GHz)
- Internal ADC clock duty cycle stabilizer
- SYNC input allows multichip synchronization
- Total power consumption: 2.16W
- 3.3V and 1.8V supply voltages
- DDR LVDS (ANSI-644 levels) outputs
- Serial port control
- Energy saving power-down modes
Applications
- Military radar and communications
- Multimode digital receivers (3G or 4G)
- Test and instrumentation
- Smart antenna systems
Functional Block Diagram

Published: 2014-07-10
| Updated: 2022-03-11