The devices are available in a 2.00mm × 2.00mm, 8-lead LFCSP or a 10-lead MSOP. The internal power-on reset circuit ensures that the DAC register is written to zero scale at power-up while the internal output buffer is configured in normal mode. The AD5693R/AD5692R/AD5691R contain a power-down mode that reduces the current consumption of the device to 2μA (maximum) at 5V and provides software selectable output loads. The AD5693R/AD5692R/AD5691R use an I2C interface. Some device options also include an asynchronous RESET pin and a VLOGIC pin, allowing 1.8 V compatibility.